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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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 Posted: Mon Sep 27, 2004 10:31 am Post subject: Squeedo: The Flash Cart prototype |
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Finally, after years of wanting to make something like this, I've just received the prototype boards of my own cart design.
I have no idea if it works or not, still waiting on some components to arrive, but it sure looks cool. Check it out:
http://mywebpages.comcast.net/memblers/nespics/IM001757.JPG
http://mywebpages.comcast.net/memblers/nespics/IM001758.JPG
http://mywebpages.comcast.net/memblers/nespics/IM001759.JPG
System specs:
Up to 1 megabyte of EPROM, or 512kB of FlashROM (32kB pages). 1 million erase cycles on Flash.
32kB of WRAM (8kB pages) optional
32kB of VRAM (8kB pages), 4kB of which is used for all 4 nametables
PIC microprocessor (can be 20Mhz or 40Mhz, any 40-pin one pretty much)
minimum of 64 bytes EEPROM for non-volative storage (100,000 cycles). Flash is of course another storage option.
32 readable and writable 8-bit registers (function of which is totally configurable in the PIC firmware). 10,000 firmware update cycles.
6 pin I/O port, 5+, GND, and 4 I/O lines.
extra features:
.047" board thickness, standard for NES
gold-plated connectors
What it doesn't do, is run copied games. I suppose it might, but with the forced 4-screen nametables, probably not. This cart is strictly for new designs.
I hope this thing works, I'll definitely let everyone know when I find out.
Last edited by Memblers on Thu Sep 30, 2004 3:39 pm; edited 1 time in total |
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tepples
Joined: 19 Sep 2004
Posts: 4887
Location: USA
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| Posted: Mon Sep 27, 2004 4:20 pm Post subject: |
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It appears you've chosen high-speed CMOS (74HC) rather than low-power Schottky (74LS) for your discrete logic parts.
How much will this cost when populated with chips?
And will it have a built-in flash programmer?
And what about nametable switching, such as for status bars? I seem to remember some limitations of the four-screen layout for presenting a stable status bar without a scanline IRQ.
Will Nintendulator and FCE Ultra be patched to play programs designed for this cart, or would emulation of the PIC eat up too much CPU time?
Will it require cutting lockout chip pin 4? |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Mon Sep 27, 2004 10:23 pm Post subject: |
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Yeah, I'm gonna try 74HC parts first. It has pretty much every advantage that I know of over 74LS (especially availability). But I'm using sockets for every IC on the prototypes, I can experiment with other chips easily.
The chips and related components alone might cost maybe $20, more or less, bought in small quantity. And that's using one of the cheaper PICs, could be another $5-$7 for a high-end one. Then there's the board price, assembly (doing it myself), probably some other stuff I'm forgetting. The price can be cheaper if I could make a whole fuckton of them, but with my budget it seems I have little choice but to plan on starting with a small quantity and see how that goes. Not sure about the final price though, first things first, gotta make sure it works as planned.
It should be able to program a Flash ROM. A 29F040 chip is able to program itself, using standard bus read/write operations. It sounds real easy in the datasheet. So I'm counting on having the NES run it's code in RAM while it erases/writes the flash. Theoretically, one could use a ZIF socket to hot-swap the chip to program a whole one. I'm not sure about that though.
The Flash chip uses 64kB sectors, so I'd have my little operating system sitting in one sector (and that one would be write-protected, so nothing dumb could ever happen to it by accident). That would leave 448kB free for general use, 7 individual sectors.
I hope the 4-screen nametables won't be a problem, I'd like to hear more about that from anyone who has much experience with this stuff.
In the design there's a scanline counter, and CPU cycle counter. They will both be able to generate IRQs.
As for the emulator support, I guess that's up to emu authors if they want to deal with the PIC. For some of the basic functions they could probably simulate it, but there's nothing to stop any developer from putting their own routines inside the PIC or even enabling code protection so the PIC can't be dumped (evil, heheh).
It's a pretty decent little chip, every instruction (except branches, etc.) uses the equivalent of 4 6502 cycles. Considering it runs at 20mhz (or 40mhz on the high-end models), that's quite a bit of processing.
And the board has a place for a lockout chip (part # 6113) if you don't want to disable it (I'm not sure why anyone wouldn't want to, that's 4 less pins to worry about cleaning, heheh). Whether or not I can get a significant amount of those chips is unknown currently.
BTW, here's an extremely preliminary register list. Lots of changes/additions are planned, but feel free to check it out.
http://mywebpages.comcast.net/memblers/micromapper.txt |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Mon Sep 27, 2004 10:39 pm Post subject: |
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BTW, I forgot to mention how the cart receives data from a PC. My serial adapter will hook up to the I/O port on the cart for that. Or, it could use the controller port also (and just not be able to read controller data at the same time it communicates).
So the serial adapter is another thing that has to be figured into the cart's cost, for development purposes at least. |
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RoboNes
Joined: 20 Sep 2004
Posts: 48
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| Posted: Tue Sep 28, 2004 2:34 am Post subject: |
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looks good  |
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Drag
Joined: 27 Sep 2004
Posts: 197
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| Posted: Tue Sep 28, 2004 1:53 pm Post subject: |
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Yeah, this pcb, and the features seem to be very good. The scanline counter and the clock cycle counter are GREAT ideas. 
Hmm... you know, if you absolutely NEEDED to bypass the 4-screen, wouldn't you be able to just tie some A lines together, like on other carts?
Also, a 1-screen mirroring controller (You know, one single nametable is used for all four ppu quadrants) would be nice, but it's not an absolute necessity.
Otherwise, it looks like this cart would be a VERY good... (ugh I can't think of a noun) It'd be good for new developments.  But this kinda has an issue, would emulator developers be willing to program this cart mapper into their emulators? This is the same problem I had when I was talking about the NES mouse. (didn't know if emulator authors would be willing to program support for it in their emulators) They probably would, your cart is more usable.
Edit: I need to scan posts more thoroughly for *links to documents that describe the registers*. |
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Hyde
Joined: 27 Sep 2004
Posts: 98
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| Posted: Tue Sep 28, 2004 2:42 pm Post subject: |
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| Drag wrote: | But this kinda has an issue, would emulator developers be willing to program this cart mapper into their emulators?
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I am willing to do it, as soon as Memblers releases an official memory map. |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Tue Sep 28, 2004 5:40 pm Post subject: |
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Yeah, it should be possible to modify the cart somehow if 4 screens isn't suitable.
For the emulator support, the only registers I'm sure about are the bankswitching ones in that doc. All the other ones are still undetermined. |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Wed Sep 29, 2004 4:42 pm Post subject: |
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I received the components I was waiting for.
The cart is working nicely so far, everything is installed on it currently except the PIC. Looking good. |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Thu Sep 30, 2004 12:11 am Post subject: |
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Woohoo, got the PIC running. Serial port works, and I managed to light up my on-board LED.
Now to test all the other I/O ports. |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Fri Oct 01, 2004 1:30 pm Post subject: |
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BTW, anyone have a preference on the type of Flash memory to use?
I can try AMD or Atmel style.
AMD is the one I mentioned with 8 64kB-sized sectors and >1,000,000 write cycles.
Atmel makes one that has 2048 256-byte-sized sectors, but does >10,000 write cycles and is a little more expensive.
I'm gonna go with AMD's chip, unless there's a strong preference for smaller sector sizes. 32kB sectors would've been nice, but that's just not available.
BTW, if you're not familiar with flash memory sectors (I'm not terribly familiar with it either), it seems to be like a sector on a disk drive, in that you can only erase and write whole sectors at a time, not just individual bytes. The write cycles, I believe is the amount of times you can erase/reprogram each individual sector. |
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tepples
Joined: 19 Sep 2004
Posts: 4887
Location: USA
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| Posted: Thu Oct 07, 2004 9:30 pm Post subject: |
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| Memblers wrote: | | Yeah, I'm gonna try 74HC parts first. It has pretty much every advantage that I know of over 74LS (especially availability). |
There's a difference between HC and HCT, which may affect compatibility with the TTL parts inside the NES. You might want to go with HCT eventually.
| Quote: | | I hope the 4-screen nametables won't be a problem, I'd like to hear more about that from anyone who has much experience with this stuff. |
At least Gauntlet II uses a nasty hack to deal with a status bar in a 4-screen mirroring setup, namely doing a variable split-screen to skip over the scanlines of the second nametable that contain the status bar.
| Quote: | | As for the emulator support, I guess that's up to emu authors if they want to deal with the PIC. For some of the basic functions they could probably simulate it, but there's nothing to stop any developer from putting their own routines inside the PIC or even enabling code protection so the PIC can't be dumped (evil, heheh). |
So if I wanted to do some testing on emulators, I'd have to build in compile-time options for a "common" mapper or your PIC based mapper, right? And dealing with a several-6502-cycle delay for mapper writes to take effect might be a pain as well, especially when trying to read data from several banks consecutively.
| Quote: | | And the board has a place for a lockout chip (part # 6113) if you don't want to disable it (I'm not sure why anyone wouldn't want to, that's 4 less pins to worry about cleaning, heheh). |
Not every budding NES developer owns his NES console. Some use one bought by a parent and have no right to open the case. Some don't know how to cut out the middle of a flathead screwdriver to make it turn the proprietary screws that hold the NES case together.
32 KB bankswitching? That'd kill all DMC usage in music engines unless you want to duplicate all waveforms in all PRG banks. I'd almost rather use UNROM style hardwiring, even if it would require a PCB redesign.
Is there another type of flash memory with sectors smaller than two PRG banks but with a decent number of erases per sector? (Single-level-cell memories have better life than multi-level-cell memories but are a bit more expensive for a given capacity. Samsung's SLC page explains it in more detail.) If so, games could write to part of PRG flash to save a game state in the same way that FDS games and 8-bit home computer games wrote to the disk. Either that or make the EEPROM bigger than 64 bytes. |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Fri Oct 08, 2004 4:10 am Post subject: |
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| tepples wrote: | | There's a difference between HC and HCT, which may affect compatibility with the TTL parts inside the NES. You might want to go with HCT eventually. |
OK, I'll try them out next time I order some parts. HC seems to work fine, testing with a toploader (it's probably uses TTL parts, I dunno for sure).
| Quote: |
So if I wanted to do some testing on emulators, I'd have to build in compile-time options for a "common" mapper or your PIC based mapper, right? And dealing with a several-6502-cycle delay for mapper writes to take effect might be a pain as well, especially when trying to read data from several banks consecutively.
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Well, other than for the debugging features, I wouldn't bother with emulators. Especially if you want to use any special features of the cart. Writing a game to support multiple mappers is cool, but sounds like it'd be kinda annoying when there's differences.
I've lost source codes to some of my older programs, and don't want to mess with changing others, etc., so one thing I plan on doing in my loader is automatically modify mapper writes. Won't be a problem.
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Not every budding NES developer owns his NES console. Some use one bought by a parent and have no right to open the case. Some don't know how to cut out the middle of a flathead screwdriver to make it turn the proprietary screws that hold the NES case together.
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There are a lot of screws on an NES, but they're all standard, actually. On every front-loader I've seen, at least. But yeah, I can get all the needed lockout chips, even if I have to remove them from the carts in my own collection. I'd have to charge a bit extra for that, because desoldering equipment is probably gonna cost me. And getting chips for overseas regions.
It's a pretty necessary chip if you want to run it on any NES, but if you use a Famicom or a top-loader it's not needed.
| Quote: | | 32 KB bankswitching? That'd kill all DMC usage in music engines unless you want to duplicate all waveforms in all PRG banks. I'd almost rather use UNROM style hardwiring, even if it would require a PCB redesign. |
You can have a fixed 16kB bank at $C000, but the total ROM size would max out at 224kB (or 256kB w/o the BIOS). My loader will handle it.
| Quote: |
Is there another type of flash memory with sectors smaller than two PRG banks but with a decent number of erases per sector? (Single-level-cell memories have better life than multi-level-cell memories but are a bit more expensive for a given capacity.
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Unfortunately, I think most of the good stuff is 3.3V and 1.6V. All I've got available to me currently is the 29Fxxx series.
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If so, games could write to part of PRG flash to save a game state in the same way that FDS games and 8-bit home computer games wrote to the disk. Either that or make the EEPROM bigger than 64 bytes. |
You can do this with the current flash, might be cumbersome with 64kB pages, but it would work. The EEPROM is internal to the PIC, the high-end series has 256 bytes.
I've got a lot of ideas about things to do with it, one thing is that if the cart is hooked up to a PC anyways, you should be able to store and load files from there within your program. Like the Famicom disk system perhaps, but with gigabytes instead of kilobytes. |
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Memblers
Site Admin
Joined: 20 Sep 2004
Posts: 1836
Location: Indianapolis
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| Posted: Tue Oct 19, 2004 4:34 am Post subject: |
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Status update.
Scanline counter works. Triggers about 3/4th of the way along (towards the right side) on my test program, this can be adjusted though.
CPU cycle counter works. It can be used simultaniously with the scanline IRQ too, works great.
Haven't had a chance to write my inital test code to my flash chip yet (have no device programmer). But I'm getting my code for it ready. I'll have at least 2 routines available for programs to use if desired, erase_sector and program_byte.
All the RAM works fine. My BIOS checks it at startup. Nametables work, they occupy the lowest 4kB of VRAM.
Gonna work on the USART next. See what kind of baud rate I can get with this thing.
Haven't written any code for the PC-side stuff, yet. Still learning (and re-learning) C so I can get started there. I might implement it into ucon64, but I haven't been able to get it to build. I seem to have bad luck with compilers. 
Board will need to be redesigned to fix some mechanical problem, possibly one minor electrical one too.
Everything's going well, no problems at all so far. |
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Guest
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| Posted: Mon Dec 13, 2004 9:58 pm Post subject: |
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Any new info? More pics at least  |
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