This "rendezvous" as you call it describes construction of the true architectural state of the CPU and other devices upon I/O. It can happen only if the core knows that other devices won't fire any interrupts for the next n cycles, which an emulator can usually predict for interrupts triggered by PPU, DMC, and mappers. More info here
(search for Accurate & efficient PPU emulation)
My English is better than your Geberquen.