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SubjectRe: Timing Question  
Posted byLaughy
Posted on10/29/04 02:19 AM
From IP64.161.57.119  



Hmm I'm trying to understand what you mean - why would an interrupt affect this? Would we still need to worry about interrupts if instead we put writes to the PPU regiters and such on a stack and rendered the entire screen at the end of the frame?



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Entire Thread
Subject  Posted byPosted On
*Timing Question  Laughy10/26/04 7:04 PM
.*Re: Timing Question  teaguecl10/26/04 8:06 PM
..*Re: Timing Question  Laughy10/27/04 6:23 PM
...*Re: Timing Question  teaguecl10/27/04 7:34 PM
....*Re: Timing Question  Laughy10/27/04 10:01 PM
.....*Re: Timing Question  teaguecl10/28/04 00:03 AM
......*Re: Timing Question  tepples10/28/04 6:11 PM
........Re: Timing Question  Laughy10/29/04 02:19 AM
........*Re: Timing Question  tepples10/29/04 1:52 PM
.........*Re: Timing Question  Laughy10/30/04 00:47 AM
..........*Re: Timing Question  Nessie10/30/04 09:35 AM
....*Re: Timing Question  Fx310/27/04 9:13 PM
..*Re: Timing Question  quietust10/26/04 10:52 PM
...*Re: Timing Question  Laughy10/27/04 6:12 PM
....*Re: Timing Question  quietust10/27/04 7:25 PM
...*Re: Timing Question  Fx310/26/04 11:35 PM
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