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Here's what I'm thinking, from what I've heard so far.
For the mapper logic, it would be nice to be able to swap smaller pieces of ROM. Say, two 8KB sections (or probably one 16KB section, if that's easier) at $C000-$FFFF. I know that would cover the CPU vectors, but it would be worth the minor trouble to be able to bankswitch the DPCM sample area.
Ideally, the board would support up to 512KB PRG-ROM, while still being usuable with smaller ROMs. The CHR-RAM would be either 16KB or 32KB, bankswitched in 8KB blocks (or 4KB, if that can be done easily).
Having an IRQ counter would be very good. If it can be done at a low cost.
Anyone have any ideas or suggestions?
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